Build a user library for PCIe cryptographic accelerator

Authors

  • Vũ Tá Cường
  • Phan Văn Kỷ

DOI:

https://doi.org/10.54654/isj.v1i16.926

Keywords:

PCIe, FPGA, hardware acceleration

Tóm tắt

Abstract— High-speed encryption device using PCIe interface has been developed and commercialized for a long time with the purpose of speeding up encryption/decryption processing and hiding algorithms and cryptographic parameters. In the article [1], the authors introduced a solution to design a PCIe cryptographic accelerator using FPGA technology. In this paper, the authors introduce a solution to build a user library for PCIe cryptographic accelerator. This library set will have functions to help applications and software on computers use PCIe acceleration cards flexibly and conveniently.

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References

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UTIMACO, “SecurityServer Se-Series Gen2”. URL: https://hsm.utimaco.com, [14-12-2021].

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Altera Corp, “DE4 User manual”, URL: ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/13.0/Tutorials/Using_PCIe_on_DE4.pdf, [14-12-2021].

Altera, “Using PCI Express on DE4 Boards”, URL: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_pci_express.pdf, [14-12-2021].

Altera, “IP Compiler for PCI Express User Guide”, URL: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_pci_express.pdf, [14-12-2021].

Xilinx “PCI Express PHY LogiCORE IP Product Guide”, URL: https://www.xilinx.com/support/documentation/ip_documentation/pcie_phy/v1_0/pg239-pcie-phy.pdf, [14-12-2021].

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Abstract views: 243 / PDF downloads: 31

Published

2023-02-13

How to Cite

Cường, V. T., & Kỷ, P. V. (2023). Build a user library for PCIe cryptographic accelerator. Journal of Science and Technology on Information Security, 2(16), 73-80. https://doi.org/10.54654/isj.v1i16.926

Issue

Section

Papers